Synchronous FSM Design Methodology for Low Power Smart Sensors and RFID Devices | Integrated circuits development | 21.09.2010
Author:
Matej Machalec, Jakub Stastny
Algorithm for DRM Signal Recognition in Time Domain and Hardware Realization | Seminars and exhibitions | 14.08.2007
Author:
Lukas Ruckay, Jiri Nedved
Sociology of Design and EDA | Mentor Graphics software | 28.06.2006
Very interesting lecture by Walden C.Rhines, Chairman and CEO of Mentor Graphics.
Author:
Walden C.Rhines
A perspective on low-power, low-voltage supervisory circuits implemented with SOI technology | others | 14.06.2004
Author:
Ondrej Subrt
How the Czech company became part of the Swatch Group | others | 04.10.2002
ACDPLL IP Core - digital phase locked loop | Integrated circuits development | 03.10.2002
ACFFT IP Core - (uP architecture) | Integrated circuits development | 03.10.2002
ACIIR IP Core - IIR filters (uP architecture) | Integrated circuits development | 03.10.2002
ACFIR IP Core - fully configurable FIR filter (HW form) | Integrated circuits development | 03.10.2002
ACPCI IP Core - PCI | Integrated circuits development | 03.10.2002